1. Field Of The Invention
The present invention relates to integrated circuit packages. More particularly, the present invention relates to an integrated circuit package which provides direct access to the signals on the chip interconnect pins by means other than conventional pins or bumps extending from the bottom of the package.
2. The Prior Art
The package for an integrated circuit semiconductor device typically fulfills three functions. It provides environmental and physical protection for the silicon chip, it provides a means to facilitate handling of the chip, and it provides electrical connection from the chip to the system in which it is installed, typically through a printed circuit board or the like.
The most common package available for integrated circuit semiconductor devices are dual inline packages, quad flatpacks, and pin grid array packages. Dual inline packages have leads on the two long sides of a rectangular package body. The number of leads available on such packages is limited, seldom rising above 48 total input/output pins. Quad flatpacks, having leads on all four sides of a square or rectangular package body can have dramatically greater numbers of pins. It is possible, for instance, to have up to one hundred pins per side for a pin count greater than four hundred total input/output pins. Input/output pins in pin grid array packages populate the area underneath the package body in regular rows and columns. By placing the pins under the package body, much higher pin densities can be achieved. Products with more than 1000 total input/output pins are currently on the market in pin grid array packages.
With the increasing complexity of integrated circuits, particularly in the area of programmable integrated circuits, observability of electrical signals occurring at the chip and board levels has become more desirable. During prototyping, for instance, hardware engineers often need to show that a particular system meets design specifications. Tools such as logic analyzers and oscilloscopes are used by hardware engineers to verify a design. In order to do this, probes connected to the logic analyzers and/or oscilloscopes must also be connected to critical printed circuit board locations, generally at the location where an integrated circuit package pin is affixed to the printed circuit board. The ends of these probes typically employ spring loaded hooks for gripping the integrated circuit pins. A standard clip for a logic analyzer probe may be 0.015" wide or larger.
Several factors create problems for hardware engineers attempting to affix probes to important pins or nodes. As mentioned before, leads can be so close together as to make it virtually impossible to attach a conventional probe to a particular lead. Quad flatpack pins can have less than 0.010 inches between them; also, fragile quad flatpack leads can also be irreparably damaged by the hooks on the ends of the probes. The peripheral input/output pins for pin grid array packages may be accessible; however, access to the inner pins is simply not possible using conventional probe technology. A 1024-pin pin grid array package (32 rows of pins, 32 pins per row), for instance, has 124 accessible peripheral pins, only 12% of the total number of pins.
Faulty printed circuit boards, whether prototypes or production pieces, can be very difficult to diagnose. Determination of a problem is typically accomplished by probing various parts of the board to see if the signals coming from selected pins match the design's schematic. Again, with dense boards containing very tight pin-to-pin spacing, such probing can be extremely difficult or impossible with conventional probes.
It is possible to mount the integrated circuit packages on boards which, by means of printed circuit board technology, connect inaccessible pins to an array of pins outside the area covered by the integrated circuit package body. Such adapter boards require a much greater area than the integrated circuit package alone, thereby negating the benefits of reduced integrated circuit package size and placing integrated circuit packages close together. An additional problem with such adapters is that electrical signals from the integrated circuit package must travel greater distances to the probe points on the adaptor board than if the probe were attached directly to the integrated circuit pin. Significantly changing the lengths of signal paths frequently causes unacceptable delays in the analysis.
While it is sometimes possible to probe the side of the printed circuit board opposite the components (electrical traces at pin locations typically terminate in plated through-holes, sometimes called "vias", which allow access to electrical signals from both sides of the board), identifying the correct position is often not trivial. Identifying the correct via locations, particularly without adequate marking on the backside of the board, can be extremely difficult. Another problem with backside contacts is that boards with components on both sides are among the most difficult to probe. Vias from the pins of one particular integrated circuit package may be covered, and therefore made inaccessible, by another package on the backside of the board.
It is possible to correctly access such pins when the pin density of a printed circuit board is about 50-100 pins per square inch. Current integrated circuit packages can have pin densities as high as 3000 pins per square inch. At such high pin densities it becomes extremely difficult to attach analysis probes to the correct pins. Indeed, the analysis probes are so large in comparison to the space available about each pin that attaching analysis probes to certain configurations of pins may be impossible.
Die level functionality can be impossible to determine in a typical integrated circuit package. A large number of operations may happen at die level with no noticeable output at the input/output pins. There would be value, then, to accessing signals which would not normally terminate in an input/output pin.
While the prior art has defined the elements needed to protect integrated circuits and manufacture integrated circuit packages, there is a clear need for a an improved system of directly accessing the electrical signals contained within the integrated circuit package by means other that the input/output pins.